1. Field of the Invention
The invention relates to a method for fabricating nanometer gate semiconductor device using thermally reflowed photoresist technology and, more specifically, to a method for fabricating nanometer gate semiconductor device using combination of an electron beam photolithography and a thermally reflowed photoresist technology.
2. Related Arts of the Invention
Conventionally, in order to promote the performance of the high frequency semiconductor device, such as higher cut-off frequency and maximum resonance frequency, except to develop the structure of the element with a high mobility, the shrinkage of the gate width is also another approach to achieve, where the nanometer photolithography is a critical technique to manufacture such a nanometer gate semiconductor device.
In the literature of IEEE Electron Device Lett. 22(2001) 367, entitled “Ultra-Short 25-nm-Gate Lattice-Matched InAlAs/InGaAs HEMTs within the Range of 400 Ghz Cut-off Frequency”, proposed by Yoshimi Yamashita, Akira Endoh, Keisuke Shinohara, Masataka Hikashiwaki, Kohki Hikosaka and Takashi Mimura, described that the high performance devices that operate in the millimeter-wave (30 to 300 GHz) and sub-millimeter-wave (300 GHz to 3 THz) frequency ranges will be major elements of the future communication system. InP-based InAlAs/InGaAs high electron mobility transistors (HEMTs) are the most promising candidates, since this material system provides high electron mobilities, high saturation velocities, and high sheet electron densities. In both field-effect transistors (FETs) and HEMTs high-speed characteristics can essentially be obtained by reducing the gate length.
However, as described on above, due to the short gate width, it is not easy to attach the gate on the surface of the substrate which may cause the problem of gate loose. Consequently, how to fixedly attach the gate on the substrate becomes another subject for the research. Furthermore, the influence of the shape of gate in DC and high frequency features of the device is also worthy of study. However, these two subjects are not failed in the scope of the invention.
Therefore, it is necessary to develop a method for fabricating a sub-micron, i.e. nanometer gate, capable of using a simplified heating process for fabrication of a nanometer gate having line width smaller than 0.1 micrometer (order of nanometers) without any expensive apparatus (e.g. the yellow light photolithography apparatus) and high technical level of manufacturing process, which makes it possible to achieve a fine line width and simplify the manufacturing process, so as to reduce the cost and improve the yield effectively.